1. Field of the Invention
The present invention relates to a semiconductor device that has circuits formed from thin film transistors (hereinafter referred to as TFT) on a substrate having an insulating surface, and to a method of manufacturing the same. More specifically, the present invention is suitably applied to an electro-optical device represented by a liquid crystal display device in which a pixel portion (or, a pixel matrix circuit) and a driver circuit provided in the periphery thereof are formed on the same single substrate, and to an electronic equipment equipped with such electro-optical device. Incidentally, the xe2x80x98semiconductor devicexe2x80x99 in this specification refers to devices in general which utilizes semiconductor characteristics to function and, therefore, the electro-optical device and the electronic equipment equipped with the electro-optical device mentioned above are contained in the category.
The progress has been made in developing a semiconductor device that has circuits formed from TFTs on substrates having an insulating surface. Active matrix liquid crystal display devices are well known as a typical example of such semiconductor device. In particular, great effort is put into the development of the electro-optical device with TFTs whose active layers are made of crystalline silicon films (hereinafter referred to as crystalline silicon TFT) integrally formed on the same single substrate, for these TFTs are high in field effect mobility and hence afford to form various functional circuits.
For instance, an active matrix liquid crystal display device is provided with a pixel portion displaying an image, a driver circuit used to display an image, etc. The driver circuit is comprised of circuits formed by using CMOS circuits as the base, such as a shift register circuit, a level shifter circuit, a buffer circuit, and a sampling circuit. Those circuits are mixedly mounted on the same single substrate.
When taking a look at those circuits separately, one does not always share its operation condition with others, which causes no small difference in characteristics required for the TFTs. For example, the pixel portion is comprised of a pixel TFT formed from an N channel TFT and of a holding capacitor, and is driven by applying voltage to liquid crystal while using the pixel TFT as a switching element. Since liquid crystal is driven with alternating current, a system called frame inversion driving is often used. In this system, characteristic required for the pixel TFT to keep power consumption low is to reduce sufficiently the OFF current value (drain current flowing at the time of OFF operation of the TFT). On the other hand, in the driver circuit, the withstand voltage has to be enhanced lest its buffer circuit to which a high driving voltage is applied is broken upon application of the high voltage. Also, securing enough ON current (drain current flowing at the time of OFF operation of the TFT) is required to enhance current drive performance.
However, there is a problem in that the OFF current of crystalline silicon TFTs tend to take a large value. In addition, degradation phenomena such as lowering of ON current value are observed in crystalline silicon TFTs, similar to MOS transistors used in ICs and the like. The main cause of the phenomena could be hot carrier injection: it is surmised that hot carriers generated by the high electric field in the vicinity of the drain bring about the degradation phenomena.
A TFT structure known as useful in reducing OFF current is the lightly doped drain (LDD) structure. According to this structure, a region doped with an impurity element in a low concentration is formed between a channel formation region and a source region, or a drain region, that is doped with a high concentration of impurity element. This lightly doped region is called LDD region.
Also known as measures for preventing the degradation brought by hot carriers is a xe2x80x98GOLDxe2x80x99 structure (Gate-drain Overlapped LDD) in which the LDD region is arranged so as to overlap with a gate electrode through a gate insulating film. These structures release the high electric field in the vicinity of the drain to prevent the hot carrier injection, and hence is effective in preventing the degradation phenomena. For instance, an article written by Mutuko Hatano, Hajime Akimoto and Takeshi Sakai in IEDM97TECHNICAL DIGEST on pages 523 to 526 in 1997 discloses a GOLD structure formed from side walls of silicon, which verifies that very excellent reliability can be obtained with the GOLD structure compared to TFTs having other structure.
Required characteristics, however, is not always the same for the pixel TFT of the pixel portion and for the TFTs of the driver circuit, such as the shift register or the buffer circuit. To give an example, a large reverse bias (negative voltage in the N channel TFT) is applied to the gate in the pixel TFT while the TFTs of the driver circuit do not basically operate under the reverse bias state. Also, the pixel TFT operates at a speed {fraction (1/100)} times the operation speed of the TFTs in the driver circuit.
In addition, GOLD structures have a problem in that, though high in the effect to prevent the degradation of ON current value, OFF current value is larger than in usual LDD structures. Thus the GOLD structures are not preferable in application to the pixel TFT. On the other hand, usual LDD structures are high in the effect to suppress OFF current value but is low in the effect to release the electric field in the vicinity of the drain and prevent the degradation due to hot carriers. It is thus not always preferable to form all TFTs to have the same structure in a semiconductor device that has a plurality of integrated circuits different from one another in the operation condition, as in active matrix liquid crystal display devices. The problem as such comes to the front especially as the characteristics of crystalline silicon TFTs are enhanced and more is demanded for the performance of active matrix liquid crystal display devices.
The present invention involves techniques for solving the problems above, and an object of the present invention is to improve operation characteristics and reliability of a semiconductor device by optimizing the structure of TFTs arranged in various circuits of the semiconductor device in accordance with the function of the respective circuits.
In order to attain the above object, according to the present invention, a semiconductor device having a pixel portion and a driver circuit for the pixel portion on the same single substrate is characterized in that:
each of the pixel portion and the driver circuit is provided with at least an N channel type TFT that has an active layer, LDD regions formed in the active layer, a gate insulating film formed between the active layer and the substrate, and a gate electrode formed between the gate insulating film and the substrate;
the LDD region in the N channel type TFT of the pixel portion is arranged so as not to overlap with the gate electrode in the N channel type TFT of the pixel portion;
the LDD region in the N channel type TFT of the driver circuit is arranged so as to overlap with the gate electrode in the N channel type TFT of the driver circuit; and
the LDD region in the N channel type TFT of the driver circuit contains a higher concentration of impurity element for imparting N type than the LDD region in the N channel type TFT of the pixel portion does.
The semiconductor device is also characterized in that the LDD region in the N channel type TFT of the driver circuit contains an impurity element for imparting N type in a concentration two or more times higher than the LDD region in the N channel type TFT of the pixel portion does, but the concentration in the former LDD region does not exceed ten times the concentration in the latter LDD region.
The semiconductor device is also characterized in that an organic resin film is formed on, at least, the N channel type TFT of the pixel portion, and in that a capacitor is comprised of a light-shielding film formed on the organic resin film, a dielectric film formed in close contact with the light shielding film, and a pixel electrode that is formed so as to partially overlap with the light-shielding film and is connected to the N channel TFT of the pixel portion.
In order to attain the above object, according to the present invention, a method of manufacturing a semiconductor device having a pixel portion and a driver circuit for the pixel portion on the same single substrate is characterized in that:
a step of forming an N channel TFT in each of the pixel portion and the driver circuit is included, the N channel TFT having an active layer, LDD regions formed in the active layer, a gate insulating film formed between the active layer and the substrate, and a gate electrode formed between the gate insulating film and the substrate;
the LDD region in the N channel type TFT of the pixel portion is arranged so as not to overlap with the gate electrode in the N channel type TFT of the pixel portion;
the LDD region in the N channel type TFT of the driver circuit is arranged so as to overlap with the gate electrode in the N channel type TFT of the driver circuit; and
the LDD region in the N channel type TFT of the driver circuit is doped with a higher concentration of impurity element for imparting N type than the LDD region in the N channel type TFT of the pixel portion.
The method of manufacturing a semiconductor device is also characterized in that the LDD region in the N channel type TFT of the driver circuit contains an impurity element for imparting N type in a concentration two or more times higher than the LDD region in the N channel type TFT of the pixel portion does, but the concentration in the former LDD region does not exceed ten times the concentration in the latter LDD region.
The method of manufacturing a semiconductor device is also characterized in that a capacitor is formed through the steps of: forming an organic resin film on, at least, the N channel type TFT of the pixel portion; forming a light-shielding film on the organic resin film; forming a dielectric film in close contact with the light shielding film: and forming a pixel electrode that partially overlaps with the light-shielding film and is connected to the N channel TFT of the pixel portion.
FIGS. 5A and 5B are explanatory views showing the structure of the present invention. The figures illustrate the positional relationship between a gate electrode and an LDD region in a bottom gate type or inversed stagger type TFT that has an active layer, LDD regions formed in the active layer, a gate insulating film formed between the active layer and said substrate, and the gate electrode formed between the gate insulating film and said substrate.
FIG. 5A shows a structure in which a gate insulating film 502 and a gate electrode 501 are formed under an active layer having a channel formation region 503, an LDD region 504 and a drain region 505. The LDD region 504 is formed so as to overlap with the gate electrode 501 through the gate insulating film 502. The LDD region as such is referred to as Lov in this specification. The Lov has an effect to release the high electric field generated in the vicinity of the drain to prevent degradation due to hot carriers and hence is suitable for use in the N channel type TFT of the driver circuit.
In FIG. 5B, a channel formation region 508, an LDD region 509 and a drain region 510 are formed in an active layer on an gate insulating film 507. The LDD region 509 is formed so as not to overlap with a gate electrode 506. The LDD region as such is referred to as Loff in this specification. The Loff is effective in reducing OFF current value, and is suitable for use in the N channel type TFT of the pixel portion.
As described above, the present invention is characterized in that a semiconductor device having a pixel portion and a driver circuit thereof takes a structure in which the pixel portion is provided with an N channel type TFT with Loff while the driver circuit is provided with an N channel type TFT with Lov, and in that the TFTs are of bottom gate type or inversed stagger type.